For the TTL circuit in Figure P17.31, assume parameters of (beta_{F}=50), (beta_{R}=0.1, quad V_{B E}(mathrm{on})=0.7 mathrm{~V}, quad

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For the TTL circuit in Figure P17.31, assume parameters of \(\beta_{F}=50\), \(\beta_{R}=0.1, \quad V_{B E}(\mathrm{on})=0.7 \mathrm{~V}, \quad V_{B E}(\mathrm{sat})=0.8 \mathrm{~V}\), and \(V_{C E}(\mathrm{sat})=0.1 \mathrm{~V}\).

(a) Determine \(i_{R B}, i_{R C P}, i_{B o}\), and \(V_{\text {out }}\) for (i) \(V_{\text {in }}=0.1 \mathrm{~V}\) and (ii) \(V_{\text {in }}=5 \mathrm{~V}\).

(b) For the case when five similar type load circuits are connected to the output, calculate the power dissipated in the circuit shown for (i) \(V_{\text {in }}=0.1 \mathrm{~V}\) and (ii) \(V_{\text {in }}=5 \mathrm{~V}\).

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