In the ECL circuit in Figure P17.9, the outputs have a logic swing of (0.60 mathrm{~V}), which

Question:

In the ECL circuit in Figure P17.9, the outputs have a logic swing of $0.60 \mathrm{~V}$, which is symmetrical about the reference voltage. Neglect base currents. The maximum emitter current for all transistors is $0.8 \mathrm{~mA}$. Assume the input logic voltages $v_{I}$ are compatible with the output logic voltage. Determine all resistor values.

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