The saturated output voltages of the comparator in the circuit shown in Figure 15.33 are (pm 10
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The saturated output voltages of the comparator in the circuit shown in Figure 15.33 are \(\pm 10 \mathrm{~V}\). Assume forward diode voltages of \(0.7 \mathrm{~V}\) and reverse Zener voltages of \(5.6 \mathrm{~V}\). The range of the input voltage is \(-2 \leq v_{I} \leq+2 \mathrm{~V}\).
(a) Find \(R_{1}\) and \(R_{2}\) such that the hysteresis width is \(0.6 \mathrm{~V}\). The minimum resistance value is to be \(4 \mathrm{k} \Omega\).
(b) Find \(R\) such that the maximum current through the diodes is \(0.8 \mathrm{~mA}\).
Figure 15.33:-
Transcribed Image Text:
(Vy+Vz) R VIL iVTH ww R + Dzi ww Dz2 R (a) (Vy+Vz) (b) Figure 15.33 (a) Schmitt trigger with Zener diode limiters and (b) voltage transfer characteristics
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Related Book For
Microelectronics Circuit Analysis And Design
ISBN: 9780071289474
4th Edition
Authors: Donald A. Neamen
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