An NMOS inverter with saturated load is shown in Figure 16.5(a). The bias is \(V_{D D}=3 \mathrm{~V}\) and the transistor threshold voltages are \(0.5 \mathrm{~V}\).

(a) Find the ratio \(K_{D} / K_{L}\) such that \(v_{O}=0.25 \mathrm{~V}\) when \(v_{I}=3 \mathrm{~V}\).

(b) Repeat part (a) for \(v_{I}=2.5 \mathrm{~V}\).

(c) If \(W / L=1\) for the load transistor, determine the power dissipation in the inverter for parts (a) and (b).

Transcribed Image Text:

VDD iDL ip + Load: VDSL VTNL, KL + VGSL iDD + UDSD Driver: VIND, KD + VGSD (a) = - VDS (sat) VGS VTN Transition point VDD-VTNL VDD "DS (b) Figure 16.5 (a) NMOS inverter with saturated load and (b) driver transistor characteristics and load curve