Figure 5.17 shows one of the early SRAMs, the 16 × 4 Signetics 7489 chip, which stores 16 4-bit words.
a. List the mode of operation of the chip for each input pulse shown in Figure 5.17c.
b. List the memory contents of word locations 0 through 6 after pulse n.
c. What is the state of the output data leads for the input pulses h through m?

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Inputs Outputs CS CS R/W Dn 3 Signetics 14 7489 Write L L H 13 L H X 03 D2 02 GND 16 x4 SRAM 10 Inhibit wnting DI H L H Oi Store - disble HH X (a) Pin layout H high voltage level し low voltage level x don'tcare (b) Truth table AI A2 DO 010 I (c) Pulse train Figure 5.17 The Signetics 7489 SRAM