A CRC is constructed to generate a 4-bit FCS for an 11-bit message. The generator polynomial is X4 + X3 + 1.

a. Draw the shift-register circuit that would perform this task (see Figure 6.4).

b. Encode the data bit sequence 10011011100 (leftmost bit is the least significant)
using the generator polynomial and give the codeword.

c. Now assume that bit 7 (counting from the LSB) in the codeword is in error and show that the detection algorithm detects the error.