Extend the memory system of Fig 12 4 to 4096 bytes of RAM and 4096 bytes of ROM List the memory address map and indicate what size decoders are needed Fig 12 4 16 11 Address bus 10 98 Decoder 3210 7 1 CPU RD WR 7 8 9 CSI CS2 RD WR AD7 CSI CS2 RD WR AD7 CSI CS2 RD WR AD7 CS1 CS2 RD WR AD7 CS1 CS2 AD...

Given the total memory size of 4096 bytes for both RAM and ROM lets assume each memory bloc ...

Extend the memory system of Fig. 12-4 to 4096 bytes of RAM and 4096 bytes of ROM.

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Extend the memory system of Fig. 12-4 to 4096 bytes of RAM and 4096 bytes of ROM. List the memory-address map and indicate what size decoders are needed.

Fig. 12-4

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Extend the memory system of Fig. 12-4 to 4096 bytes of RAM and 4096 bytes of ROM.

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16-11 Address bus 10 98 Decoder 3210 7-1 CPU RD WR -7 8 9 CSI CS2 RD WR AD7 CSI CS2 RD WR AD7 CSI CS2 RD WR AD7 CS1 ៖ CS2 RD WR AD7 CS1 CS2 AD9 128 x 8 RAM 1 128 x 8 RAM 2 128 x 8 RAM 3 128 x 8 RAM 4 128 x 8 ROM Data Data Data Data Data Data bus

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