Question: Can you suggest a security improvement to either option in Figure 6.11, using only three DES chips and some number of XOR functions? Assume you

Can you suggest a security improvement to either option in Figure 6.11, using only three DES chips and some number of XOR functions? Assume you are still limited to two keys. K, K P EDE C-1 C (b) One-loop CBC K K K3

K, K P EDE C-1 C (b) One-loop CBC K K K3 Pr n E D A E B C An-1 B-1 C-1 (b) Three-loop CBC Figure 6.11 Use of Triple DES in CBC Mode

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