Consider the delays given in Table 7.6. Ben Bitdiddle builds a prefix adder that reduces the ALU

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Consider the delays given in Table 7.6. Ben Bitdiddle builds a prefix adder that reduces the ALU delay by 20 ps. If the other element delays stay the same, find the new cycle time of the single-cycle MIPS processor and determine how long it takes to execute a benchmark with 100 billion instructions. 

Table 7.6 Delays of circuit elements Element Parameter Delay (ps) register clk-to-Q tpeg 30 register setup tyetup 20 multiplexer tmux 25 ALU TALU 200 memory read tmem 250 register file read tRFread 150 register file setup tRFsetup 20

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Digital Design and Computer Architecture

ISBN: 978-0123944245

2nd edition

Authors: David Harris, Sarah Harris

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