For flip-flop A of Table 15.1 and a 2 GHz clock, check Figure 15.19 for timing violations. If there is a hold violation, indicate where delay must be added, specify the necessary delay, and recheck for setup violations. If there is a setup violation, calculate the maximum error-free frequency. 

Data in Table 15.1

Transcribed Image Text:

Parameter (ps) ts th tccQ taco FF A 20 10 10 20 FF B 100 -20 2 30 FF C -30 80 40 50