A sequential circuit has one input (X) and two outputs (Z₁ and Z₂). An output Z₁ = 1 occurs every time the input sequence 010 is completed provided that the sequence
100 has never occurred. An output Z₂ = 1 occurs every time the input sequence 100 is completed. Once a Z₂ = 1 output has occurred, Z₁ = 1 can never occur, but not vice versa.
(a) Derive a Mealy state graph and table with a minimum number of states (eight states).
(b) Try to choose a good state assignment. Realize the circuit using J-K flip-flops and NAND gates. Repeat using NOR gates.