Exercise 7.35 (Technology Mapping and Verification). Draw the circuit structure calculated by bi-decompositions in Exercises 7.24 . . . 7.34. Verify whether the decomposition structure realizes the given basic function of Fig. 7.1. Compare both the required numbers of gates and the depth of the designed structure with the results of minimal disjunctive forms. Practical tasks:

1 Load the TVL system e73dec9.sdt of Exercise 7.34. This TVL system includes the system function F(x, y) as object number 4.

2 Draw the circuit structure calculated by bi-decompositions in Exercises 7.24 . . . 7.34.

3 Verify whether the decomposition structure realizes the given basic function of Fig. 7.1.
4 Extend the comparison of Task 4 in Exercise 7.23 by the values of the design using bi-decomposition. Summarize conclusions from this comparison.