Question: CP10.3 Consider the system in Figure CP10.1, where Design a compensator G s c ( ) so that the steady-state tracking error to a ramp
CP10.3 Consider the system in Figure CP10.1, where
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Design a compensator G s c( ) so that the steady-state tracking error to a ramp input is zero and the set
tling time (with a 2% criterion) is Ts ≤ 5 s. Obtain the response of the closed-loop system to the input
R s( ) = 1 s2, and verify that the settling time require
ment has been satisfied and that the steady-state error is zero.
G(s) = 1 s(s+3)
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