P10 39 A unity feedback system has a plant We desire that the phase margin be P M 30 For a ramp input r t ( ) t , we want the steady state error to be equal to 0 05 Design a phase lag compensator to satisfy the requirements Verify the results G(s) 40 s(s 2)

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P10 39 A unity feedback system has a plant We desire that the phase margin be P M       30  For a ramp input r t ( )   t , we want the steady state error to be equal to 0 05  Design a phase lag compensator to satisfy the requirements  Verify the results  G(s)    40 s(s 2)

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Question: P10.39 A unity feedback system has a plant We desire that the phase margin be P M . . = 30. For a ramp input

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