A pipelined processor has two branch delay slots. An optimizing compiler can fill one of these slots
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A pipelined processor has two branch delay slots. An optimizing compiler can fill one of these slots 85 percent of the time and can fill the second slot only 20 percent of the time. What is the percentage improvement in performance achieved by this optimization, assuming that 20 percent of the instructions executed are branch instructions?
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Related Book For 
Computer Organization
ISBN: 9780072320862
5th Edition
Authors: V Carl Hamacher, Carl Hamacher, Zvonko G Vranesic, Safwat G Zaky
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