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( 1 0 pts ) A finite state machine ( FSM ) has a 1 bit input and a 1 bit output. If it detects

(10 pts) A finite state machine (FSM) has a 1 bit input and a 1 bit output. If it detects 101 pattern in its input, its output is 1 for one clock cycle, otherwise it is 0. Note that ...10101dots contains two 101 patterns. Draw a state diagram for this FS.
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