Question
1. (4 points) Implement a 3-bit counter circuit that counts 1,2,4,6 and repeat. Provide the transition table and equations only. 2. (8 points) Design
1. (4 points) Implement a 3-bit counter circuit that counts 1,2,4,6 and repeat. Provide the transition table and equations only. 2. (8 points) Design a 3-bit synchronous up counter using T flip flops. Provide the transition table and equations and then design the circuit. 3. A) (4 points) Design a Finite State Machine for a counter that counts the prime numbers from 0 to 8 downwards (7,5,3,2 and repeat). Provide the state transition table and state transition diagram only. B) (4 points) Design the circuit for the least significant bit of the next state.
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Digital Systems Design Using Verilog
Authors: Charles Roth, Lizy K. John, Byeong Kil Lee
1st edition
1285051076, 978-1285051079
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