1.

a) What named device(s) in Figure 6.9 are used differently by the jump instruction than how those device(s) are used by any of add, load, and store instructions?

b) In addition to registers, what other logic function(s) must be contained within the box (device) in Figure 6.9 that is named the register unit? Use the nature of the input and output buses of register unit to guide your thinking. In your answer, specifically describe these logic functions, their exact sizes, and how their inputs and outputs are connected to the registers and the inputs and outputs of the register unit.

M1 M3 32-bit pgm. ctr 32-bit register unit 4 data in instr. decoder data ALU reg A reg B dst instruction M2 in data out in data out data in operation Figure 6.9 ustration of data paths including data memory M1 M3 32-bit pgm. ctr 32-bit register unit 4 data in instr. decoder data ALU reg A reg B dst instruction M2 in data out in data out data in operation Figure 6.9 ustration of data paths including data memory