1 a. Which is more important for floating-point programs: two-way set associatively or hit under one miss for the primary data caches? What about integer programs? Assume the following average miss rates for 32 KB data caches: 5.2% for floating-point programs with a direct-mapped cache, 4.9% for these programs with a two-way set associative cache, 3.5% for integer programs with a direct-mapped cache, and 3.2% for integer programs with a two-way set associative cache. Assume the miss penalty to 12 is 10 cycles, and the L.2 misses and penalties are the same.

b. Distinguish weak scaling from strong scaling with regards to multi-processors.

c. Assume a main memory access time of 36 ns and a memory system capable of a sustained transfer rate of 16 GB/sec. If the block size is 64 bytes, what is the maximum number of outstanding misses we need to support assuming that we can maintain the peak bandwidth given the request stream and that accesses never conflict? If the probability of a reference colliding with one of the previous four is 50%, and we assume that the access has to wait until the earlier access completes, estimate the number of maximum outstanding references. For simplicity, ignore the time between misses.

d. 64 bit processors that run x 86-64 or ARMvs only have a 48 bit address space. Explain reason.

e. Define parallel processing and illustrate how it is implemented in processing of information.

f. Define Address aliasing prediction.

2) a. Discuss five techniques that have been used to Improve Memory Performance Inside a DRAM Chip

b. Power is now the major constraint to using transistors; in the past, it was a raw silicon area. Hence modern microprocessors offer many techniques to try to improve energy efficiency despite flat clock rates and constant supply voltages: Discuss four of the techniques. c. Processor engineering has developed several technologies that can be employed to improve processor performance. Identify three of the technologies and explain how they improve the performance of the processors.

3) a. Discuss five techniques that have been used to Improve Memory Performance Inside a fast page move DRAM Chip Extended date Out Bro Synchronous DRAM. RAMBU Cached DRAM.

b. Flash memory is a type of EEPROM (Electronically Erasable Programmable Read-Only Memory), which is normally read-only but can be erased. The other key property of Flash memory is that it holds its contents without any power. Flash is used as the backup storage in PMDs in the same manner that a disk functions in a laptop or server. In addition, because most PMDs have a limited amount of DRAM, Flash may also act as a level of the memory hierarchy, to a much larger extent than it might have to do so in the desktop or server with a main memory that might be 10 to 100 times larger. Flash uses a very different architecture and has different properties than standard DRAM. In detail discuss five differences