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1. Assume that the operation times for the major functional units of a single-cycle machine are the following: memory units: 200 ALU and adders: 100

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1. Assume that the operation times for the major functional units of a single-cycle machine are the following: memory units: 200 ALU and adders: 100 ps register file (read or write: 50 ps ps Assuming that mux, control unit, PC accesses, sign extension unit, and wires have no delay, which of the following implementations would be faster and by how much? a) An implementation in which every instruction operates in 1 clock cycle of a fixed length. b) An implementation where every instruction executes in l clock cycle using a variable length clock, which for each instruction is only as long as it needs to be (critical path) (Such an approach is not terribly practical, but it will allow us to see what is being sacrificed when all the instructions must execute in a single clock cycle of the same length.) You can find info on the jump instruction in the text book and in the slides! To compare the performance, assume the following instruction mix: 25% loads, 10% stores, 45% ALU instructions, 15% branches, 5% jumps. 2. Using a multicycle CPU where each stage of an instruction requires l clock cycle, with the following mix: 25% loads, 10% stores, 1 1 % branches 2% is the average CPI. (To do this, you will first have to determine how many "stages" each instruction type uses as it goes through the pipeline.) Jumps, and 52% ALU, what

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