1. Design a 4-bit linear feedback shift register (LFSR) where Q* = (Q1 Qo) & Q3-1. The circuit can perform basic encryption of a data byte D by shifting it N times. When St = 1, D is loaded into the 4-bit register and N is loaded into a 4-bit down counter. The register then shifts until the counter reaches (, when Done is signaled. a) Illustrate the encryption of the following sample data: D=0011, N=5 b) Draw a block diagram of the LFSR data path and control unit. Define any necessary control signals. c) Draw the state diagram for the control unit. d) Write a complete VHDL model (entity and behavioral architecture) for the LFSR. Use at least two processes: one to generate the control signals and one to update the registers based on those signals. 1. Design a 4-bit linear feedback shift register (LFSR) where Q* = (Q1 Qo) & Q3-1. The circuit can perform basic encryption of a data byte D by shifting it N times. When St = 1, D is loaded into the 4-bit register and N is loaded into a 4-bit down counter. The register then shifts until the counter reaches (, when Done is signaled. a) Illustrate the encryption of the following sample data: D=0011, N=5 b) Draw a block diagram of the LFSR data path and control unit. Define any necessary control signals. c) Draw the state diagram for the control unit. d) Write a complete VHDL model (entity and behavioral architecture) for the LFSR. Use at least two processes: one to generate the control signals and one to update the registers based on those signals