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1. Explain the events happening in each stage of pipeline in a pipelined processor. 2. Explain the north bridge and south bridge bus architecture, indicating

1. Explain the events happening in each stage of pipeline in a pipelined processor. 2. Explain the north bridge and south bridge bus architecture, indicating what components are connected to both. 3. What is the need for cache memory? Explain the fully associative cache mapping technique 4. Explain the RAID disk technology.

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