1. Given the following flip-flop input equations for a state machine with no inputs (i.e. some type of counter), specify the next two states after 000. The states are represented by

A(t)B(t)C(t).

(A represents A inverted)

JA=B(t)C(t)

KA=B(t)

JB=C(t)

KB=A(t)

JC=A(t)B(t)

KC=B(t

2. Implement the function described by the following truth table using:

a. the 8:1 multiplexer below.

b. a 4:1 multiplexer with the most significant bit as an input.

c. a 4:1 multiplexer with the least significant bit as an input.

A	B	C	F(output)
0	0	0	0
0	0	1	0
0	1	0	1
0	1	1	1
1	0	0	0
1	0	1	1
1	1	0	1
1	1	1	0

3. Design a special function XY flip-flop that has the following state table from a JK flip-flop. Draw the new flip-flop starting from the block diagram of a JK flip-flop.

Flip flop

inputs

X Y Q(t) Q(t+1)

0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1

4. Implement the function f(ABCD)=m (0,1,3,4,9,14,15) by using the following chips along with any needed combination logic gates. Label the inputs and connect the output to an led. Y is the output. S are the select lines. E is the enable.

a. 8 by 1 MUX

b. 4 to 16 line decoder

5. Implement the function of the truth table using a 3 by 8 decoder that has active high outputs and an additional multiple input OR gate.

C	B	A	Y
0	0	0	1
0	0	1	1
0	1	0	0
0	1	1	0
1	0	0	1
1	0	1	0
1	1	0	1
1	1	1	0

6.

Label the outputs with the appropriate minterms.

7. Given the following state table, implement the design with Toggle flip-flops. List the flip-flop input equations as the solution.

Present		Next		TA	TB
State	input	State	output
A(t) B(t)	x	A(t+1)B(t+1)	z
0 0	0	0 0	0
0 0	1	0 1	0
0 1	0	1 0	1
0 1	1	1 1	0
1 0	0	0 1	1
1 0	1	0 0	1
1 1	0	0 0	1
1 1	1	0 1	0

8. Design a counter that counts 0,2,3,0,2,3 using JK flip-flops. Specify that the counter be self-starting. The count of 1 should return to 0.

9. Reverse engineer the following sequential circuit. Complete the below state table. Note the 4*1 Multiplexers with X on the most significant input.

X(t)	Y(t)	C	Tx	Sy	Ry	X(t+1)	Y(t+1)
0	0	0
0	0	1
0	1	0
0	1	1
1	0	0
1	0	1
1	1	0
1	1	1

10. Given as many 2 by 1 multiplexers as needed, construct a 16 by 1 multiplexer. Label the select lines A, B, C, and D. Label the input lines I_o through I₁₅.