1. Use the following code fragment Loop: LD R1, 0(R2) ADDI R1, R1, 1 ST R1, 0(R2) ADDI R2, R2, 4 BNE R3, R2, Loop Assume that the initial value of R3 is R2 + 40. Show the timing of this instruction sequence for the 5-stage pipeline with full forwarding hardware. Assume that the branch is handled by predicting it as not taken. If all memory references take 1 cycle, how many cycles does this loop take to execute