1. Using a diagram, illustrate how to properly organize 256KB of ROM made of 64K x 8 chips connected to 8088 microprocessor, knowing that the chips have access time of 600 ns and the processor operates at 5MHz clock rate. The chips are to be placed at address 00000H and PLD is the only available option for decoding. (20 points)

IOM RD WR OE 244 IO/M - RDS WR Buffered control bus OE A19156 AINS A47154 A168 373 A, Ais A12 A16 G 8088 Als Aja A3 A12 A, A, As "244 AIS A4 A1 Az All Ajo Ag Buffered address bus OE A, Ag As A, A2 A ALE G 373 OE 27 AD, AD ADS AD AD AD AD AD DT/R DEN *245 A, B A . As By . B A B Az B A . A. B. G DIR Do DS D D D D Do Buffered data bus