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1. We want to compare the computers C1 and C2. C1 has the machine instructions for the floating-point operations, while C2 has not (FP

1. We want to compare the computers C1 and C2. C1 has the machine instructions for the floating-point operations, while C2 has not (FP operations are implemented in the software using several non-FP instructions). Both computers have a clock frequency of 500 MHz. In both we perform the same program, which has the following mixture of commands: Command Type FP addition FP multiplication FP division Non - FP instructions Dynamic Share of instructions in program 16% 10% 8% 66% Instruction duration C1 6 8 10 3 C2 20 32 66 3 a) Calculate the MIPS for the computers C1 and C2. b) Calculate the CPU program execution time on the computers C1 and C2, if there are 24000 instructions in the program? c) At what mixture of instructions in the program will both computers C1 and C2 be equally fast? 2. A program runs in 300 seconds on a machine, with division operations responsible for 160 seconds. You want to improve the speed of the program to run 3 times faster. How much do you have to improve the speed of the division operations? Illustrate the whole process. 3. Consider a 32-bit microprocessor. Assume that, on average, 20% of the operands and instructions are 64 bits long. 40% are 32 bits long, and 40% are 16 bits long. a) Is it possible to double the performance using 64-bit microprocessor having the same bus cycle duration of a 32-bit microprocessor? 4. Assume that a computer has L1 cache with miss ratio of 5% and access time of 1ns, L2 cache with hit ratio of 99% and access time of 10ns, main memory with hit ratio of X% and access time of 50ns. a) What should be the value of X if the effective access time is not more than 1.5ns? b) Design the system. 5. A computer system uses 16-bit memory addresses. It has a 2K-byte cache organized in a direct-mapped manner with 64 bytes per cache block. Assume that the size of each memory word is 1 byte. Show the number of bits in each of the Tag. Block, and Word fields of the memory address and design the cache organization.

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