1) Your task is to compare the memory efciency of four different styles of instruction set architectures. The architecture styles are: 1.AccumulatorA]l operations occur between a single register and a memory location. 2.Memory-memoryAll three operands of each instruction are in memory. 3.8tackAll operations occur on top of the stack. Only push and pop access memory; all other instructions remove their operands from stack and replace them with the result. The implementation uses a stack for the top two entries; accesses that use other stack positions are memory references. 4. LoadstoreAll operations occur in registers, and register-to-register instructionshave three operands per instruction. There are 16 general-purpose registers, and register speciers are 4 bits long. To measure memory efficiency, make the following assumptions about all four instruction sets: 0 The opcode is always 1 byte (8 bits). I All memory addresses are 2 bytes (16 bits). I All data operands are 4 bytes (32 bits). All instructions are an integral number of bytes in length. i There are no other optimizations to reduce memory traffic, and the variables A, B, C, and D are initially in memory. Invent your own assembly language nuremonics and write the best equivalent assembly language code for the high-level-language fragment given. Write the four code sequences for A=B+Q B=A+Q BIA-E Calculate the instruction bytes fetched and the memory-data bytes transferred. Which architecture is most efficient as measured by code size? Which architecture is most eficiente as measured by total memory bandwidth required (code + data)