10. (25 points) On Jan. 2, 2018, it was announced that the meltdown vulnerability of Intel processors may allow normal user programs from database applications to JavaScript in web browsers-to discern to some extent the layout or contents of protected kernel memory areas. Please answer the following questions. (a) (5 points) The meltdown vulnerability is caused by shared translation lookaside buffer (TLB) in order to reduce the latency for user/kernel mode switch. Please describe how TLB works while translating virtual address to physical address (b) (6 points) The page table shown on the right is for a Page # 1 Page Frame # | Reference Bit system with 16-bit virtual and physical addresses and with 4,096-byte pages. Please translate the following 16-bit virtual addresses into their corresponding physical address in hexadecima 2 1. 0xA12C 2. 0x3A9D 3. 0xB2DO 12 10 12 14 (c) (4 points) On a 64-bit address computer paging physical memory into 4KB page frame, a simple page table can take too much space to map memory pages. How does the operating system do to avoid using huge page table? Please provide at least two different approaches. (It can be different on Intel and ARM processors.) (d) (5 points) Please describe the possible method to prevent the security vulnerability on TLB without replacing the processor and discuss the performance impacts to the operating systems (e) (5 points) The execution of one user process may switch between user mode and kernel model. Please describe the procedure of mode switch and answer if requesting for the PID of a process, i.e., getpid0 in POSIX, requires a mode switch