12. Suppose a pipeline processor has three stages, as shown in Figure 1-14. Assume in a perfect scenario (such as no branch instructions, no data dependence between a) How many clock cycles does it take to execute 10 instructions? What is the b) How many clock cycles does it take to execute n instructions? If n is instructions, and no memory I/O waiting). throughput in terms of instructions per cycle? sufficiently large, what is the throughput in terms of instructions per cycle