13. I-type and J-type instructions alter the R-type format to include immediates becaune (a) it would be imposeible to develop an architecture that used a single format for all instructions, (b) good design demands good compromision. (c) it makes for an inherently faster architeoture. (d) None of the above. 14. Assembly language is (a) a series of 1 's and 0 's that translates directly to charges on wires. (b) the lowest level of programming where each line is still readable by a programmer. (c) a high level language that lets a pogrammer casily understand program constructs. (d) None of the above. 15. Machine language is (a) a series of 1 's and 0 's that translates directly to charges on wires. (b) the lowest level of programming where each line is still readable by a programmer. (c) a high level language that easily lets a pogrammer understand programming constructs. (d) None of the above. 16. The beg and bne instructions (a) change the program counter value. (b) require the evaluation of a conditional value. (c) do not perform addition. (d) Some, but not all, of the above. The j instruction (a) changes the program counter value. (b) requires the evaluation of a conditional value. (c) does not perform addition. d) Some, but not all, of the above. 18. The miercarditecture datapseb reainters. chiteeture componente. (e) connecte the reginter files to the instrue tion and date memory. (d) All of the above. 19. A multi-eyele processor (a) can execute a single instruction, on average, faster than the other covered cypes. (b) can execute a single instruction, on wer. age, cheaper than the other covered types. (c) can execute multiple instructions, on sw. erage, faster than the other covered types. (d) More than one or none of the above. 20. A pipelined processor (a) can execute a single instruction, on average, faster than the other covered types. (b) can execute a single instruction, on average, cheaper than the other covered types. (c) can execute multiple instructions, on average, faster than the other covered types. (d) More than one or none of the above. 21. A single-cycle processor (a) can execute a single instruction, on average, faster than the other covered types. (b) can execute a single instruction, on average, cheaper than the other covered types. (c) can execute multiple instructions, on average, faster than the other covered types. (d) More than one or none of the above. 22. The control unit of a single-cycle processor (a) can be represented for a given instruction by a lookup table. (b) can be represented for a given instruction by a finite state machine. (c) can change multiple times over a single instruction's execution time. (d) More than one of the above