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13. The Boolean expression for the logic circuit drawn in Figure is: a) Y = ABC c) Y = (A + B)C b) Y=A+B+C d)

13. The Boolean expression for the logic circuit drawn in

Figure is:

a) Y = ABC c) Y = (A + B)C

b) Y=A+B+C d) Y=AB+C

14. Which logic circuit of Figure represents the

Boolean expression Y = A(BC+D)?

15. A single rung of a ladder logic program is arranged with:

a) input conditions connected from left to right, with the output at the far right.

b) input conditions connected from right to left, with the output at the far left.

c) the output in the center and the input conditions to the left and right of it.

d) all input conditions in parallel and all output conditions in series.

16. The___________ gate output is 1 if one or more of

its inputs are 1.

24. Draw a PLC ladder diagram program for the gate logic array shown in Figure.

17. Draw the equivalent gate logic array for the PLC ladder diagram shown in Figure .

18. What will be the data stored in the destination address

B3:4 of Figure 4-17 when the input is true?

19. The status bit of switches and pushbuttons connected

to a PLC are stored in the:

a) input image table file. c) user program.

b) output image table file. d) all of these.

20. The address for the point on the I/O module

shown in Figure would be:

a) I:6/1 c) O:6/1

b) I:1/6 d) O:1/6

21. The address for the point on the I/O module

shown in Figure would be:

a) I:2/8 c) O:8/2

b) I:8/2 d) O:2/8

22. The scan is normally a sequential process of:

a) reading the control logic, evaluating the outputs, and updating

the inputs.

b) writing the control logic, evaluating the outputs, and updating

the inputs.

c) reading/writing the status of inputs and updating the outputs.

d) reading the status of inputs, evaluating the control logic, and energizing or de-energizing the outputs.

23. For the scan process illustrated in figure , step 2 involves:

a) solving the ladder program.

b) transferring data to the output module.

c) transferring data to the input module.

d) reading data from the input module.

24. The actual scan time is:

a) calculated and stored in the PLC's memory.

b) computed each time the END instruction is executed.

c) the time taken to scan inputs and outputs and execute the user program.

d) all of these.

25. The Examine If Closed instruction:

a) is also known as the Examine-On instruction.

b) is also known as the XIC instruction.

c) looks and operates like a normally open relay contact.

d) all of these.

26. The Examine If Open instruction:

a) is also known as the Examine-Off instruction.

b) is also known as the XIO instruction.

c) looks and operates like a normally closed relay contact.

d) all of these.

27. The most likely module address for LS1 of Figure is:

a) LS1 I2

b) LS1 O2

c) I:2/2

d) O:2/2

28. The addressing format used with PLCs:

a) is standard for all PLCs.

b) indicates what PLC input is connected to what input device.

c) indicates what PLC output is connected to what output device.

d) both b and c.

29. Branch input instructions are used to create a:

a) series path of input instructions.

b) parallel path of input instructions.

c) serial connection of input modules

d) parallel connection of input modules

30. The Output Energize instruction:

a) is also known as the OTE instruction.

b) signals the PLC to energize or deenergize the output.

c) looks and operates like a relay coil.

d) all of these

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