14.28 Anearlier form of logic circuits, now obsolete, utilized NMOS transistors only and was appropriately called NMOS logic. The basic inverter, shown in Fig. P14.28, utilizes an NMOS driver transistor Q1 and another NMOS transistor Q2, connected as a diode, forms the load of the inverter. Observe that Q2 operates in saturation at all times. Assume Vt1 = Vt2 = Vt , 1 = 2 = 0, and denote

kn1/kn2 by kr . Also neglect the body effect in Q2 (note that the body of Q2, not shown, is connected to ground).

(a) Sketch iv for Q2 and hence show that for vI low (i.e., vI Vt and both Q1 and Q2 are operating in saturation. Show that the relationship is linear and find its slope. (d) If VOL 0 V, find the current IDD drawn from VDD and hence the average power dissipation in the inverter, assuming that it spends half the time in each of its two states. (e) Find numerical values for all the parameters asked for above for the case VDD = 1.8 V, Vt = 0.5 V, (W/L)1 = 5, (W/L)2 = 1 5 , and nCox = 300 A/V2.

14.28 An earlier formoflogiccircuits, now obsolete, utilized NMOS transistors only and was appropriately called NMOS logic. The basic inverter, shown in Fig. Pl4.28, utilizes an NMOS driver transistor Q and another NMOS 0,, connected as a diode, forms the load of the inverter. Observe that 0, operates in saturation at all times. Assume Az 30, and denote by k Also neglect the body effect in Q2 (note that the body of Q2, not shown, is connected to ground) Figure P14.28 14.28 An earlier formoflogiccircuits, now obsolete, utilized NMOS transistors only and was appropriately called NMOS logic. The basic inverter, shown in Fig. Pl4.28, utilizes an NMOS driver transistor Q and another NMOS 0,, connected as a diode, forms the load of the inverter. Observe that 0, operates in saturation at all times. Assume Az 30, and denote by k Also neglect the body effect in Q2 (note that the body of Q2, not shown, is connected to ground) Figure P14.28