A cache acts as a filter. For example, for every $1000$ instructions of a program, an average of $20$ memory accesses may exhibit low enough locality that they cannot be serviced by a $2MB$ cache. The $2MB$ cache is said to have an MPKI $($misses per thousand instructions$)$ of $20,$ and this will be largely true regardless of the smaller caches that precede the $2MB$ cache. Assume the following cache$/$latency$/$MPKI values: $32K\frac{B}{1}\frac{?}{100},128K\frac{B}{2}\frac{?}{80},512K\frac{B}{4}\frac{?}{50},2M\frac{B}{8}\frac{?}{40},8M\frac{B}{16}\frac{?}{10}.$ Assume that accessing the off$-$chip memory system requires $200$ cycles on average. For the following cache configurations, calculate the average time spent accessing the cache hierarchy. What do you observe about the downsides of a cache hierarchy that is too shallow or too deep?

a$.32$ KB L$1$; $8$ MB L$2$; off$-$chip memory

b$.32KBL1$;$512KBL2$;$8$ MB L$3$; off$-$chip memory

c$.32$ KB L$1$; $128$ KB L$2$; $2$ MB L$3$; $8$ MB L$4$; off$-$chip memory