2- An 8 bit CPU having 64kBytes addressing capability will be connected to a memory block that contains 2 pieces of 27C128 EPROM, 1 piece of 62C64 static RAM and 1 piece of 28C16 EEPROM. Reset vector of the CPU assigns ProgramCounter-0000H. a) Draw the memory-addressing map of the described system and related logical chip selection table for the decoder. b) Draw the decoder circuit scheme by using minimum number of NAND gates only. c) Draw the circuit scheme of the system by using 74HC138 as the decoder IC.