2. Design and Implement the MIPS Single Cycle Processor for the JR instruction. Draw the Datapath to implement this instruction. You can add logic elements such as Multiplexers, Sign-extender etc. in your design The MIPS state elements are as follows: CLK CLK CLK PC PC WE3 WE 32 A1 A2 RD1 RD2 32 '32 A RD Instruction Memory 32 32 RD Data Memory WD 5 A3 WD3 Register File 32 32 Also, show the main decoder truth table like Table 7.3 and Table 7.4 of the textbook. 2. Design and Implement the MIPS Single Cycle Processor for the JR instruction. Draw the Datapath to implement this instruction. You can add logic elements such as Multiplexers, Sign-extender etc. in your design The MIPS state elements are as follows: CLK CLK CLK PC PC WE3 WE 32 A1 A2 RD1 RD2 32 '32 A RD Instruction Memory 32 32 RD Data Memory WD 5 A3 WD3 Register File 32 32 Also, show the main decoder truth table like Table 7.3 and Table 7.4 of the textbook