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(20 pts, 10 each) Consider the RISC computer (byte-addressable with 32-bit words) with a 5-stage pipelined data path, as discussed in class. R5 and R6

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(20 pts, 10 each) Consider the RISC computer (byte-addressable with 32-bit words) with a 5-stage pipelined data path, as discussed in class. R5 and R6 contain 20 and 15, respectively. Assume the memory address of the instruction is 2000 and LOOP 30. All the numbers are in decimal. What are the contents (in decimal) of RA, RB, RZ, RY, and PC after stages 2, 3, 4, 5 for the following two instructions, respectively? Fill out the below table for each case. Use "X" for any unknown values. Hint: You can find the sequence of actions of the two instructions on Page 170 of the textbook. Assume PC will increment only ONCE in stage l for this problem, as we have only one instruction. (a) Branch if_[R5] -[R6] LOOP (b) Call Register R6 1. Stage 2 Stage 3Stage 4Stage 5 RA RB RZ RY PC (20 pts, 10 each) Consider the RISC computer (byte-addressable with 32-bit words) with a 5-stage pipelined data path, as discussed in class. R5 and R6 contain 20 and 15, respectively. Assume the memory address of the instruction is 2000 and LOOP 30. All the numbers are in decimal. What are the contents (in decimal) of RA, RB, RZ, RY, and PC after stages 2, 3, 4, 5 for the following two instructions, respectively? Fill out the below table for each case. Use "X" for any unknown values. Hint: You can find the sequence of actions of the two instructions on Page 170 of the textbook. Assume PC will increment only ONCE in stage l for this problem, as we have only one instruction. (a) Branch if_[R5] -[R6] LOOP (b) Call Register R6 1. Stage 2 Stage 3Stage 4Stage 5 RA RB RZ RY PC

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