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[20/15/15/20] Your task is to compare the memory efficiency of four different styles of instruction set architectures. The architecture styles are Accumulator-All operations occur between
[20/15/15/20] Your task is to compare the memory efficiency of four different styles of instruction set architectures. The architecture styles are Accumulator-All operations occur between a single register and a mem- ory location Memory-memory-All instruction addresses reference only memory loca tions ur on top of the stack. Push and pop are the only nds from the Stack-All operations occ instructions that access memory; all others remove their opera stack and replace them with the result. The implementation uses a hard- wired stack for only the top two stack entries, which keeps the processor circuit very sma and low cost. Additional stack positions are kept in memory locations, and accesses to these stack positions require memory references. Load-store-All operations occur in registers, and register-to-register in- structions have three register names per instruction To measure memory efficiency, make the following assumptions about all four instruction sets: All instructions are an integral number of bytes in length The opcode is always one byte (8 bits). Memory accesses use direct, or absolute, addressing The variables A, B. C, and D are initially in memory a. [20] Invent your own assembly language mnemonics (Figure A.2 provides a useful sample to generalize), and for each architecture write the [20/15/15/20] Your task is to compare the memory efficiency of four different styles of instruction set architectures. The architecture styles are Accumulator-All operations occur between a single register and a mem- ory location Memory-memory-All instruction addresses reference only memory loca tions ur on top of the stack. Push and pop are the only nds from the Stack-All operations occ instructions that access memory; all others remove their opera stack and replace them with the result. The implementation uses a hard- wired stack for only the top two stack entries, which keeps the processor circuit very sma and low cost. Additional stack positions are kept in memory locations, and accesses to these stack positions require memory references. Load-store-All operations occur in registers, and register-to-register in- structions have three register names per instruction To measure memory efficiency, make the following assumptions about all four instruction sets: All instructions are an integral number of bytes in length The opcode is always one byte (8 bits). Memory accesses use direct, or absolute, addressing The variables A, B. C, and D are initially in memory a. [20] Invent your own assembly language mnemonics (Figure A.2 provides a useful sample to generalize), and for each architecture write the
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