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3 . ( 8 points ) Assume that the logic blocks used to implement the single - cycle processor have the following delay values: I

3.(8 points) Assume that the logic blocks used to implement the single-cycle processor have the
following delay values:
I-Mem/D-Mem is the amount of time to access the Instruction or Data Memory.
Register File is the amount of time to read rs1 and rs2 after a rising clock edge.
PC Read is the amount of time needed after a rising clock edge for the new PC value to appear
on the output; this delay value applies to the PC only.
Register Setup is the amount of time a registers data input must be stable before a rising clock
edge; this delay value applies to both the PC and Register File.
Control is the total amount of time for the Control unit and the ALU control unit to produce the
4-bit ALU operation.
(a)(4 points) Consider the four instructions: add, ld, sd, beq, which is the least time consuming
one and how much time does it need?
(b)(4 points) What is the minimum clock period for this processor? You must justify your answer (8 points) Assume that the logic blocks used to implement the single-cycle processor have the
following delay values:
"I-Mem/D-Mem" is the amount of time to access the Instruction or Data Memory.
"Register File" is the amount of time to read rs1 and rs2 after a rising clock edge.
"PC Read" is the amount of time needed after a rising clock edge for the new PC value to appear
on the output; this delay value applies to the PC only.
"Register Setup" is the amount of time a register's data input must be stable before a rising clock
edge; this delay value applies to both the PC and Register File.
"Control" is the total amount of time for the Control unit and the ALU control unit to produce the
4-bit "ALU operation".
(a)(4 points) Consider the four instructions: add, ld, sd, beq, which is the least time consuming
one and how much time does it need?
(b)(4 points) What is the minimum clock period for this processor? You must justify your answer.
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