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3 . Assuming a 1 6 M memory for a 1 6 - bits system, using 5 1 2 K Byte RAM chips. a )
Assuming a M memory for a bits system, using K Byte RAM chips. a How many RAM chips are necessary? b If we were accessing one word, how many chips would be involved? c How many address bits are needed for each RAM chip? d How many address bits are needed for the entire memory? e If highorder interleaving is used, where is the address xB located? f Repeat e for loworder interleaving Suppose we have a bit CPU, with regular registers, and their current values are: Rx Rx Rx Rx Rx Rx Rx Rx Also, the following cells represent some parts of the memory, where each cell contains one byte, and the addresses are labeled on the right side. Eg the value in address is: Here the address is in hexadecimal format. addr: addr: addr: addr: A addr: B Based on vonNeuman model, answer the following questions. Currently PC program counter register value is x what is the meaning of this number? what is the data that CPU is going to fetch? What is the PC value after the current cycle? What is the data CPU is going to fetch in the next cycle? Mnemonic Encoding Description add rS rD ssssdddd Add register rS to register rD sub rS rD ssssdddd Subtract register rS from register rD mul rS rD ssssdddd Multiply register rD by register rS div rS rD ssssdddd Divide register rD by register rS and rS rD ssssdddd And register rS with register rD or rS rD ssssdddd Or register rS with register rD xor rS rD ssssdddd Xor register rS with register rD shr rS rD ssssdddd Shift right register rD by register rS shl rS rD ssssdddd Shift left register rD by register rS Optional What is the CPU operation according to the fetched data in the next CPU cycle check the mnemonic table to get the decoded result Optional What is the execution result of the operation in question list the value of related register
Assuming a M memory for a bits system, using K Byte RAM chips.
a How many RAM chips are necessary?
b If we were accessing one word, how many chips would be involved?
c How many address bits are needed for each RAM chip?
d How many address bits are needed for the entire memory?
e If highorder interleaving is used, where is the address xB located?
f Repeat e for loworder interleaving
Suppose we have a bit CPU, with regular registers, and their current values are:
Rx Rx Rx Rx
Rx Rx Rx Rx
Also, the following cells represent some parts of the memory, where each cell contains one byte, and the addresses are labeled on the right side. Eg the value in address is: Here the address is in hexadecimal format.
addr:
addr:
addr:
addr: A
addr: B
Based on vonNeuman model, answer the following questions.
Currently PC program counter register value is x what is the meaning of this number?
what is the data that CPU is going to fetch?
What is the PC value after the current cycle?
What is the data CPU is going to fetch in the next cycle?
Mnemonic Encoding Description
add rS rD ssssdddd Add register rS to register rD
sub rS rD ssssdddd Subtract register rS from register rD
mul rS rD ssssdddd Multiply register rD by register rS
div rS rD ssssdddd Divide register rD by register rS
and rS rD ssssdddd And register rS with register rD
or rS rD ssssdddd Or register rS with register rD
xor rS rD ssssdddd Xor register rS with register rD
shr rS rD ssssdddd Shift right register rD by register rS
shl rS rD ssssdddd Shift left register rD by register rS
Optional What is the CPU operation according to the fetched data in the next CPU cycle check the mnemonic table to get the decoded result
Optional What is the execution result of the operation in question list the value of related register
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