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3 . Assuming a 1 6 M memory for a 1 6 - bits system, using 5 1 2 K Byte RAM chips. a )

3. Assuming a 16M memory for a 16-bits system, using 512K Byte RAM chips.
a) How many RAM chips are necessary?
b) If we were accessing one word, how many chips would be involved?
c) How many address bits are needed for each RAM chip?
d) How many address bits are needed for the entire memory?
e) If high-order interleaving is used, where is the address 0x0000B2 located?
f) Repeat e) for low-order interleaving
4. Suppose we have a 16-bit CPU, with 8 regular registers, and their current values are:
R0=0x0002 R1=0x 0000 R2=0x 1101 R3=0x 0009
R4=0x 0001 R5=0x 0002 R6=0x 0000 R7=0x 0009
Also, the following cells represent some parts of the memory, where each cell contains one byte, and the addresses are labeled on the right side. Eg. the value in address 1000 is: 01011010. Here the address is in hexadecimal format.
...
01011010
...
10000010
01000101
10001001
00000010
...
...
addr: 1000
...
addr: 1008
addr: 1009
addr: 100A
addr: 100B
Based on von-Neuman model, answer the following questions.
1) Currently PC (program counter) register value is 0x1008, what is the meaning of this number?
2) what is the data that CPU is going to fetch?
3) What is the PC value after the current cycle?
4) What is the data CPU is going to fetch in the next cycle?
Mnemonic Encoding Description
.........
add rS, rD 10000001 ssssdddd Add register rS to register rD.
sub rS, rD 10000010 ssssdddd Subtract register rS from register rD.
mul rS, rD 10000011 ssssdddd Multiply register rD by register rS.
div rS, rD 10000100 ssssdddd Divide register rD by register rS.
and rS, rD 10000101 ssssdddd And register rS with register rD.
or rS, rD 10000110 ssssdddd Or register rS with register rD.
xor rS, rD 10000111 ssssdddd Xor register rS with register rD.
shr rS, rD 10001000 ssssdddd Shift right register rD by register rS.
shl rS, rD 10001001 ssssdddd Shift left register rD by register rS.
......
5)[Optional] What is the CPU operation according to the fetched data in the next CPU cycle (check the mnemonic table to get the decoded result)?
6)[Optional] What is the execution result of the operation in question 5)?(list the value of related register)

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