1. [3 pts] What is the average CPI for the FP version of the ERAU Run?

Avg. CPI = 6.842

2. [3 pts] How long will it take to execute this FP version of ERAU Run on our (pretty slow) hardware?

Run time = 1.30 sec

3. [3 pts] What is the MIPS rate for our hardware with the FP co-processor?

MIPS = 14.615

If we compile the ERAU Run with the no-FP-hardware option and then measure the running time of the resultant (integer equivalent) program, we get a time of 4.25 seconds.

4. [3 pts] How much faster is our program when we compile with the floating point co-processor option than when we compile without it?

5. [8 pts] What is the average number of integer instructions being produced by the compiler to replace each floating point instruction? (Average over all FP instructions; you have no way of telling how many integer instructions to replace an FP add versus how many for an FP divide, for example.) As per the third row of the table above, continue to assume that the CPI for all integer instructions is 5
6. [2 pts] What is the MIPS rate of our hardware executing this integer-equivalent version of the ERAU Run?

1. [50 pts total] Answer all parts A through J, inclusive, below. I have defined a new computer program to be used as a benchmark for performance measurements. It's called the "ERAU Run". It contains the mix of instructions in the table, below (the numbers are not at all intended to be real world - this is a torture for undergraduates, the numbers don't have to be sensible :-) The table also shows the cycles per instruction and reflects the fact that our hardware includes a floating point co-processor. Instruction Cycles Required Per Instruction ERAU Run Instruction Count Floating point multiply or divide 7,000,000 Floating point add or subtract 2,000,000 All others (non floating point) 10,000,000 The gee compiler we use is intended for use on many different machines; some with floating point co-processors, some without; so the user can, via compile time option request that the code be compiled for a floating point architecture or a non-floating point architecture in which case the compiler must translate each floating point instruction into a set of equivalent integer instructions that run on the main CPU only. Assuming that our hardware is clocked at 100MHz: 1. [50 pts total] Answer all parts A through J, inclusive, below. I have defined a new computer program to be used as a benchmark for performance measurements. It's called the "ERAU Run". It contains the mix of instructions in the table, below (the numbers are not at all intended to be real world - this is a torture for undergraduates, the numbers don't have to be sensible :-) The table also shows the cycles per instruction and reflects the fact that our hardware includes a floating point co-processor. Instruction Cycles Required Per Instruction ERAU Run Instruction Count Floating point multiply or divide 7,000,000 Floating point add or subtract 2,000,000 All others (non floating point) 10,000,000 The gee compiler we use is intended for use on many different machines; some with floating point co-processors, some without; so the user can, via compile time option request that the code be compiled for a floating point architecture or a non-floating point architecture in which case the compiler must translate each floating point instruction into a set of equivalent integer instructions that run on the main CPU only. Assuming that our hardware is clocked at 100MHz