3.1 The following state transition table is a simplified model of process management, with the labels representing transitions between states of READY, RUN, BLOCKED, and NONRESIDENI. Give an example of an event that can cause each of the above transitions. Draw a diagram if that helps. 3.2. Assume that at time 5 no system resources are being used exeept for the processor and memory. Now consider the following events: At time 5: P1 executes a comasasd to read from disk unit 3. At time 15: PS stime slice expires At time 18: P7 executes a comarand to write to disk unit 3. At time 20: P3 executes a comanand to read from disk unit 2 At time 24: PS executes a command to write to disk unit 3 . At time 2R: PS is swapped out. At time 33: An interrupt occurs from disk unit 2: P3s read is complete. At time 36: Aa interrupt occurs froma disk unit 3:Pl 's read is complete. At time 3. P8 terminates. At time 40: An interrupt occurs from disk unit 3: P5's write is complete. At time 44:P5 is swapped back in. At time 48: An interrupt occurs from disk unit 3:P7 w write is complete. For each time 22, 37, and 47 , identify which state each process is in. If a proces is blocked, further identify the event on which is it blocked 3.3 Figure 3.96 contains seven states In principle, one could draw a transition between any two states, for a total of 42 different transitions. a. List all of the possible transitions and give an example of what could cause each transition. b. List all of the impossible transitions and explain why. 3.4 For the seven-state process model of Figure 3.9b, draw a queucing diagram similar to that of Fieure 3.86 . 3.5 Consider the state transition diagram of Figure 3.96. Suppose that it is time for the OS to dispatch a process and that there are processes in both the Ready state and the Ready/Suspend state, and that at least one process in the Ready/Suspend state has higher scheduling priority than any of the processes in the Ready state. Two extreme policies are as follows: (1) Always dispatch from a process in the Ready state, to minimize swapping, and (2) always give preference to the highest-priotity process, even though that may mean swapping when swapping is not necessary. Suggest an intermediate policy that tries to balance the concerns of priority and performance. 3.6 Table 3.13 shows the process states for the VAXVMS operating system. a. Can you provide a justification for the existence of so maay distinct wait states? b. Why do the following states not have resident and swapped-out versions: Page Fault Wait, Collided Page Wait, Common Event Wait, Free Page Wait, and Resource Wait? c. Draw the state transition diagram and indicate the action or occurrence that causes cach transition. 3.7 The VAX/VMS operating sysem makes use of four processor access modes to facilitate the protection and shariag of system resources among processes. The access mode determines - Instruction execution privileges, What instructions the processor may execute - Memory aceess privileges Which locations in virtual memory the current instruction may access