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3(10 points) Suppose you have a load-store computer with the following instruction mix Operation Frequenc Number of clock cvcles ALU ops Loads Stores Branches 40%
3(10 points) Suppose you have a load-store computer with the following instruction mix Operation Frequenc Number of clock cvcles ALU ops Loads Stores Branches 40% 20 % 18% 22 % 2 4 4 The ALU ops (arithmetic logic unit ops) typically use operands in CPU registers and hence they take fewer clock cycles to execute. However, if you want to add a memory operand to a CPU register, then you would have to explicitly load it into a CPU register. For such ALU operations, you would say that they are paired with a load instruction since the value moved from memory would be used only for the particular ALU operation and not used anywhere else. We observe that 30% of the ALU ops are paired with a load (i.e., they occur together), and we propose to replace these ALU ops and their loads with a NEW instruction. Assume that this NEW instruction takes 4 clock cycles. However, with the NEW instruction added, branches will take 8 clock cycles rather than 6. Assuming that the clock rate is unchanged, would this change improve performance? Justify your answer quantitatively by comparing expressions for CPU Execution time. Show all your work. Do not do any rounding when you compute the frequency of the NEW nstructions
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