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4. Analysis: Read the portion of the research article below and write your reflection about which solution would you implement as a computer architect and

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4. Analysis: Read the portion of the research article below and write your reflection about which solution would you implement as a computer architect and why: Following Moore's law, processor frequency doubled every 18 to 24 months until the mid 2000's.Due to the ever increasing core design complexity of the high performance processors (run-time data dependency analysis, speculative execution, branch predic- tion, ...) and the power consumption caused by the very high frequency, researchers started to look at other strategies to continue to increase system performances. The first solution is to optimize the instruction set for certain application classes. The gen- eralization of the SIMD extensions, which first appeared in the general purpose high performance processors in the early 90's[I], to all processors including the embedded ones is an evidence of this trend. The second solution, straightforward from the point of view of the hardware de signer, is to integrate several cores onto the same silicon die. Due to power dissipation issues, the integrated cores should feature a high performance per Watt ratio and an overall current consumption acceptable for the application. Following this trend, t ITRS predicts that a many-core era will arrive soon 3 general and high performance computing domains, there is a clear trend to wards Chip Multiprocessor (CMP) architectures. The processors integrated in these CMP architectures are symmetric in both performance and function. Amdahl's law states that the performance improvementto be gained from using some faster mode of execution is limited by the fraction of the time the faster mode can be used [4. Based on Amdahl's law, several works have defined performance asymmetric architectures which accelerate the sequential execution by using fast cores and the parallel execution by a massive usage of small cores having lower performance but better MIPS/Watt ratio thar the fast ones. Therefore both the cost over performance ratio 56 and the power con- sumption of these architectures are lower than the corresponding symmetric ones. 4. Analysis: Read the portion of the research article below and write your reflection about which solution would you implement as a computer architect and why: Following Moore's law, processor frequency doubled every 18 to 24 months until the mid 2000's.Due to the ever increasing core design complexity of the high performance processors (run-time data dependency analysis, speculative execution, branch predic- tion, ...) and the power consumption caused by the very high frequency, researchers started to look at other strategies to continue to increase system performances. The first solution is to optimize the instruction set for certain application classes. The gen- eralization of the SIMD extensions, which first appeared in the general purpose high performance processors in the early 90's[I], to all processors including the embedded ones is an evidence of this trend. The second solution, straightforward from the point of view of the hardware de signer, is to integrate several cores onto the same silicon die. Due to power dissipation issues, the integrated cores should feature a high performance per Watt ratio and an overall current consumption acceptable for the application. Following this trend, t ITRS predicts that a many-core era will arrive soon 3 general and high performance computing domains, there is a clear trend to wards Chip Multiprocessor (CMP) architectures. The processors integrated in these CMP architectures are symmetric in both performance and function. Amdahl's law states that the performance improvementto be gained from using some faster mode of execution is limited by the fraction of the time the faster mode can be used [4. Based on Amdahl's law, several works have defined performance asymmetric architectures which accelerate the sequential execution by using fast cores and the parallel execution by a massive usage of small cores having lower performance but better MIPS/Watt ratio thar the fast ones. Therefore both the cost over performance ratio 56 and the power con- sumption of these architectures are lower than the corresponding symmetric ones

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