4. Design a G-L flip-flop that behaves as follows: If G=0, the flip-flop does not change its output state. If G=1, the next output state is equal to L. a. Derive the characteristic equation of the G-L flip-flop. b. Convert J-K flip-flop to G-L flip-flop. 5. Design a 4-bit synchronous counter that counts the prime integer numbers greater than one and less than 15. The counter shall start counting from the smallest prime integer up to the greatest prime integer in the above range. Once the counter reaches the greatest prim integer, it goes back and starts counting from the smallest prime integer. Use JK flip flops and any necessary logic gates to build this counter. a. Write down the excitation table of the JK flip flop. b. Draw the state diagram of the counter. c. Specify how many flip flop required to build this counter (explain your answer)? d. Write down the transition table. Use k-maps to find the equations of the flip flop inputs. f. Plot the logic circuit of your counter.