4 Latch

I. Given a SR latch of 2 NOR gates (slide 12 of Lecture Note 7: Sequential Network), replace the NOR gate on top with a NAND gate. Analyze the revised circuit.

Slide 12:

1. Write the truth table at times t₁, t₂ and t₃ as the table in slide 20.

Slide 20:

2. Draw the state diagram.

3. Describe the state table and characteristic expression.

II. Repeat Problem I. However, replace the two NOR gates of the SR latch with two NAND gates.