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4. Review the following MIPS assembly code. a. Write code that the assembler will assemble after macro expansion of the code. [5.0pts] b. Show the
4. Review the following MIPS assembly code. a. Write code that the assembler will assemble after macro expansion of the code. [5.0pts] b. Show the symbol table for this code using relative index of instruction starting at 1. [5.Opts] macro macl (argl) add $argl, $argl, argl addi $argl, $argl, -1 end macro .macro mac2 ($argl, arg2) mac1 ($arg2) sub $argl, $argl, arg2 end macro .text L1: addi $tl, zero, 10 addi $t2, $zero,5 L2: mac1 ($t1) 3: LA: mac1 (St2) mae2 ($t2, $t1) L5: bne $t2, $tl, L2 5. If code in Q4 is loaded into a 32-bit MIPS based computing system, determine symbol table corresponding to the code with actual address values. Assume that the processor is connected to a byte addressable memory. [10.0pts] 4. Review the following MIPS assembly code. a. Write code that the assembler will assemble after macro expansion of the code. [5.0pts] b. Show the symbol table for this code using relative index of instruction starting at 1. [5.Opts] macro macl (argl) add $argl, $argl, argl addi $argl, $argl, -1 end macro .macro mac2 ($argl, arg2) mac1 ($arg2) sub $argl, $argl, arg2 end macro .text L1: addi $tl, zero, 10 addi $t2, $zero,5 L2: mac1 ($t1) 3: LA: mac1 (St2) mae2 ($t2, $t1) L5: bne $t2, $tl, L2 5. If code in Q4 is loaded into a 32-bit MIPS based computing system, determine symbol table corresponding to the code with actual address values. Assume that the processor is connected to a byte addressable memory. [10.0pts]
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