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4 - way set - associative L 1 D cache ( with 5 1 2 lines of 1 2 8 bytes each ) . The
way setassociative LD cache with lines of bytes each
The cache has the following outputs:
Tag shows the tag of the most recent line,
Set shows the set of the most recent line,
Offset shows the offset of the most recent line, and
Hit shows a if you get a cache hit or a if you get a cache miss.
To test the cache, you clear it you can assume it is completely empty before your test starts and you program the processor to request the following addresses from RAM one after the other:
x
x
x
x
xDC
If your cache is working properly, what are the expected output of Tag, Set, Offset, and Hit after each of the requests above give your answers in hex
Write your answer in a table as follows:
Address Tag Set Offset Hit
x
x
and so on
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