4.1 Consider the following instruction: Instruction: AND Rd, Rn, Rm Interpretation: Reg[Rd] = Reg[Rn] AND Reg[Rm] 4.1.1 [5] What are the values of control signals generated by the control in Figure 4.10 for this instruction? 4.1.2 [5] Which resources (blocks) perform a useful function for this instruction? 4.1.3 [10] Which resources (blocks) produce no output for this instruction? Which resources produce output that is not used? Read register 1 4 ALU operation Read data 1 Read register 2 MemWrite MemtoReg Instruction ALUSC Registers Read Zero > ALU ALU result Address Read data Write register data 2 Write data RegWrite Data Write memory data 32 64 MemRead Sign- extend 4.1 Consider the following instruction: Instruction: AND Rd, Rn, Rm Interpretation: Reg[Rd] = Reg[Rn] AND Reg[Rm] 4.1.1 [5] What are the values of control signals generated by the control in Figure 4.10 for this instruction? 4.1.2 [5] Which resources (blocks) perform a useful function for this instruction? 4.1.3 [10] Which resources (blocks) produce no output for this instruction? Which resources produce output that is not used? Read register 1 4 ALU operation Read data 1 Read register 2 MemWrite MemtoReg Instruction ALUSC Registers Read Zero > ALU ALU result Address Read data Write register data 2 Write data RegWrite Data Write memory data 32 64 MemRead Sign- extend