4.1 Consider the following instruction:

Instruction: AND Rd, Rs, Rt

Interpretation: REG [Rd] = Reg [Rs] AND Reg [Rt]

4.1.1 What are the values of control signals generated by the control in Figure 4.2 for the above instruction?

4.1.2 Which of the resources (blocks) perform a useful function for this instruction?

4.1.3 Which resources (blocks) produce outputs, but their outputs are not used for this instruction? Which resources produce no outputs for this instruction?

Branch ALU operation Lo Data MemWrite pm Register # PC - Address Instruction Registers ADALUTH Address - Register # Data Instruction memory memory - Register # Regwrite Data MemRead See Control FIGURE 4.2 The basic implementation of the MIPs subset, including the necessary multiplexors and control lines. The top multiplexer Mua) controls what value replaces the PC (PC +for the branch destination address the multiplexor is controlled by the gate that "AND together the zero output of the AU and a control signal that indicates that the instruction is a branch. The middle multipleton, whose output returns to the register file, is used to steer the output of the AL (in the case of an arithmetic logical instruction or is used the output of the data memory (in the case of a load) for writing into the register file. Finally, the bottommest multiplexer to determine Whether the second AL input is from the registers (for an arithmetic logical instruction or a branch) or from the offset field of the instruction ALU, whether data memor for a load or store. The added control lines are straightforward and determine the operation performed at the the hould read or writeand whether the registers should perform a write operation. The control lines are shown in color to make them easier to