(5) [8 pts] Consider a 16-byte cache with 2 bytes per block, a 2-way associative mapping and a LRU (least recently used) block replacement policy is used. Assume the size of the main memory is 32 bytes. A MIPS program contains a sequence of read accesses to the main memory; the following table shows the corresponding read addresses. Complete the following table by filling a hit/miss (entry in the table shown below) of each access and the cache set number where the data is stored. (Assume the cache is empty initially). Instruction No. Address Cache set number (decimal format) Hit/Miss I1 12 13 14 15 16 17 18 19 110 111 112 0x00 Ox04 Ox01 Ox05 Ox08 Ox02 Ox18 Ox11 Ox14 Ox00 Ox1c Ox15